The present invention relates in general to integrated circuits, and in particular to improved circuit implementations for transmission line drivers particularly suited for networking applications.
In data communication systems, it is often required that a line driver's output impedance and the receiver's input termination resistor match the cable's (i.e., transmission line's) characteristic impedance. Further, in such systems, wide-band transformers are typically utilized to provide the required isolation between the receiver and the transmitter on the one hand and the cable on the other. Two possible approaches exist to implement the line driver. In the first approach, the driver is a voltage source in series with source resistance that has a value equal to the line's characteristic impedance. FIG. 1 is a simplified depiction of this case where a voltage source driver 100 is shown along with source and load resistances R.sub.S and R.sub.L, respectively, and isolation transformer 102 with a 1:n turn's ratio. Voltage source driver 100 is implemented by using an operational amplifier (opamp) 104 along with gain-setting resistors R1 and R2 in a closed-loop configuration. One drawback of this approach is the voltage drop across R.sub.S which limits the voltage swing between the driver and the line.
In the second approach, the driver is a current source with a shunt source impedance equal to the cable's characteristic impedance as shown in FIG. 2. The advantage of this solution is that the voltage swing across the current source is the same as that of the load. In the case of 10 BASE-T data communication, for example, this swing is typically 5 volts peak-to-peak (or 5 Vpp). In applications with lower power supply voltages, this provides more margin in order to design the driver. However, in order to design an accurate current source driver, often times opamps are employed in a feedback circuit where a sensing resistor is used in series with the opamp's output in order to determine current source's output current level. Such an implementation eliminates all the extra voltage headroom mentioned above resulting in an almost similar voltage swing limitations as in the case of the voltage source driver shown in FIG. 1.
For higher speed and lower voltage applications, the design of the line driver opamp has posed a few challenges. Prior art approaches have typically utilized voltage-feedback opamps that are particularly suitable in MOS technology since they can easily realize an infinite input impedance due to the MOS transistor's zero gate current level. In high-speed applications, the opamp is often implemented by employing gain-setting resistors. The parallel combination of the gain-setting resistors and the opamp's input capacitance introduces a parasitic pole. The input capacitance is typically a Miller-multiplied version of an MOS transistor's C.sub.gd (gate-to-drain capacitance) plus C.sub.gs (gate-to-source capacitance). For high speed applications, this parasitic pole can be a serious limiting factor. Another speed limiting factor in CMOS opamps is the limited slew-rate. This is due to the fact that usually the input stage in voltage-feedback opamps, especially in low-voltage applications, is a class-A type circuit where the slowing current is limited to the tail-current of the input differential-pair. Thus, there are at least two drawbacks, namely the existence of a parasitic pole at the opamp's input and the limited slew rate that in combination limit the large-signal bandwidth and speed of operation of the conventional line driver circuits.
There is therefore a need for improved circuitry to implement high speed, low voltage transmission line drivers.